20 GHz low power QVCO and De-skew techniques in 0.13μm digital CMOS

A novel VCO topology is proposed that combines the low power of –gm oscillators with the inherent buffering of Colpitts oscillators. Using this topology, a quadrature VCO (QVCO) was implemented in 0.13 μm digital CMOS consuming 32 mW at 20 GHz with just over 10% tuning range. The measured phase noise of the QVCO at 20.17 GHz is -102.41 dBc/Hz at 1 MHz offset. Because the load is isolated from the tank, the QVCO can directly drive 50-Ohm impedances or large capacitive loads with no additional buffering. A technique to use the QVCO to deskew clocks is also presented whereby the QVCO accepts a small forwarded clock amplitude of 20 mV, and provides a 200 mV peak-to-peak differential clock output with linear control of the phase over the complete range, 0-360.